Secure, Trusted, and Assured Microelectronics (STAM) Center

The STAM Center investigates new technologies and methodologies to offer opportunities for designing secure computing devices and systems that go beyond what is currently achievable. The center couples its research mission with active recruiting and training of students, especially domestic students, targeting applications of national security importance.

The center conducts fundamental research in three technical areas meant to establish the foundation for future secure and trusted semiconductor/ microelectronics technologies: (1) new substrates, synthesis, and fabrication, (2) new computing paradigms and architectures, and (3) integrated sensing, edge computing, and secure communications.

Latest News

STAM Center Open House Highlights

We thank all the attendees and exhibitors at the STAM Center open house event for making it a success.  

The new ASU Cyber Range is operational

The Arizona Cyber Range (AzCR) a hybrid cyber range specifically developed as a training platform for security issues related to real hardware/electronic devices.

STAM Center Open House

The STAM Center will be hosting an open house event on April 19th. Please join us for demonstrations of the STAM Center's research around security and trustworthiness of microelectronics and computer systems.

STAM Center at GOMACTech 2022 Conference

Center researchers in collaboration with researcher from MIT introduced a new processor architecture [1] for use in accelerator-based edge processing systems. The architecture includes security features to protect the system in uncontrolled, unattended environments while adapting its resource utilization and processing to ambient events. [1] Situation-Aware Adaptive Architecture for Secure Edge Processing, Alan Ehret, Carsten Schwicking, Karen...

Prof. Kinsy gives a talk at MIT on “Designing Secure Computing Systems from Untrusted Components”

On October 25th, Prof. Kinsy gave a talk at MIT titled "Secure and Trusted Microelectronics: Designing Secure Computing Systems from Untrusted Components", with the following abstract: "The current trend in system-on-chip (SoC) design is system-level integration of heterogeneous technologies consisting of a large number of processing elements such as programmable RISC cores, memories, DSPs, and accelerator function units/ASIC. These processing...

Prof. Michel Kinsy gives two talks at Tapia Conference

Prof. Kinsy gave two talks CMD-IT/ACM Richard Tapia Celebration of Diversity in Computing Conference, titled: Next-Generation Secure Computer Systems: Post-Quantum Cryptosystems Trireme: A RISC-V Open-Source Architecture Design Space Exploration Toolbox CMD-IT/ACM Richard Tapia Celebration of Diversity in Computing Conference is the premier venue to acknowledge, promote and celebrate diversity in computing.

STAM Center at DAC’21

Join us at DAC'21 in San Francisco to learn about our recent work: "Distributed Memory Guard: Enabling Secure Enclave Computing in NoC-based Architectures", in Security Techniques across the Board (STAB) session, by G. Dessouky, M. Isakov, M. A. Kinsy, P. Mahmoody, M. Mark, A. Sadeghi, E. Stapf, S. Zeitouni, Proceedings of the 58th Annual Design Automation Conference. Association for Computing Machinery, San Francisco, CA, USA.

STAM Center hosting SECRISC-V on November 7th

Join us on November 7th for SECRISC-V'21, a workshop on secure RISC-V architecture design. SECRISC-V'21 is held along with IEEE International Symposium on Workload Characterization (IISWC). SECRISC-V'21 program can be found here.  

CENTER TECHNICAL AREAS

Researchers and students at the center investigate, design and prototype application-aware processors and embedded systems with cybersecurity compliance, technology transfer and field tests readiness in mind. The team uses a multidisciplinary and integrative approach consisting of algorithmic optimization, design flow automation, hardware-firmware co-development and prototyping. The center is organized in six research laboratories – two technology laboratories (SemiSec Laboratory and LUCS), and four application laboratories (ASCS Laboratory, AITS Laboratory, CAES Laboratory, and SECPS Laboratory).

Semiconductor Security

Semiconductor Security (SemiSEC) Laboratory: Zero-Trust IC Fabrication, Age-related IC Failures and Security, Supply Chain Trust Challenges, Secure-by-Construction IC Design

 Unconventional Substrates 

Laboratory for Unconventional Computing Substrates (LUCS): Approximate Computing, Cryogenics Computing, Quantum Computing, Secure Bio-Microelectronics

Adaptive and Secure Systems 

Adaptive and Secure Computing Systems (ASCS) Laboratory: Situation-Aware Computing, Post-Quantum Security, Self-Healing Systems

Private and Secure AI

Artificial Intelligence Technology and Systems (AITS) Laboratory: Privacy-Preserving AI/ML Systems Secure ML Hardware Accelerators Real-Time/Low-power ML Engines

Computer Architecture

Computer Architecture & Embedded Systems (CAES) Laboratory: Trusted Execution Environment Architecture, Enclave-Driven Architecture, Secure High-Performance Computing Architecture, Graph Processor Design.

Secure & Resilient IoT Systems

Secure & Resilient Cyber-Physical Systems (SECPS) Laboratory: Physically-Distributed Systems and Infrastructures, Sharing Confidential Information in IoT Systems, Secure Group Anonymous Authentication